Program analysis and optimization in a JIT compiler

Dynamic compilation is widely used in runtime-systems for modern programming languages like Java. The big challenge is to generate efficient code but not spending too much time for compilation. (trade-off between optimization effort and execution time) Most JIT compilers employ a multi-stage compilation model where only the "hot" methods are optimized for maximum performance. JIT compilers do not have the "global" view on the whole input program. i.e. they cannot simply perform inter-procedural analysis. The advantage of an dynamic environment compared to a classical static compiler is that each program can be optimized for the platform is runs on. Another difference is the availability of runtime profile information. A JIT compiler can make use of such information for optimization if such profiles can be collected with low runtime overhead.

This project tries to make use of the Hardware Performance Monitors (HPM) to give advice to the JIT compiler (in our case the IBM Jikes RVM) which optimizations it should apply to a method. In nowadays JITs methods are compiled with many different optimization levels. Each level contains a set of optimizations to apply. (the higher the optimization level the more optimizations applied). Often there is a static cost/benefit function that is applied when to recompile a method with a higher optimization level. However, many optimizations have no or little effect on particular methods and on the other hand it may be beneficial to apply aggressive (and expensive) optimizations earlier if the performance counters indicate that this would pay off in the long run. The infrastructure to monitor HW events at runtime in the JIT compiler is already implemented. Your task is to identify optimizations that would benefit from such a scheme and to modify the recompilation system of the compiler to make use of the performance monitoring hardware.

  • Environment: Java, Jikes RVM, Linux, Pentium 4
  • Keywords: JIT compiler, Java, profiling, hardware performance counters
  • Contacts: Prof. Th. Gross, 63 27342, RZ H1.2, thomas.gross at inf.ethz.ch
  • Supervisors: Prof. Th. Gross, 63 27342, RZ H1.2, thomas.gross at inf.ethz.ch
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