Irina Chihaia Tuduce

ETH Zentrum RZ H-12 CH-8092 Zurich Tel: +41 1 632 73 54 E-mail: chihaia at inf.ethz.ch

About Me

I am a research and teaching assistant at the Swiss Federal Institute of Technology (ETH) at the Institute for Computer Systems, working on my doctoral thesis under the supervision of Prof. Thomas Gross.

I was born in Piatra-Neamt, Romania. In 1994, I graduated from the "Gheorghe Sincai" Science High School in Baia-Mare, with a major in Mathematics and Physics. During my computer science studies at the Technical University of Cluj-Napoca, my interests were computer networks, operating systems, and artificial intelligence. In February 1999, I had the opportunity to come to ETH and work on my diploma thesis entitled "Message Passing for Gigabit/s Networks with Zero-Copy under Linux". I received my diploma degree in computer science in September 1999. In October 1999, I joined ETH Zürich.

Research

My work centers around applications with high space requirements that cannot (at this time) be distributed. I investigate architectural and operating system mechanisms to support these applications to finish the execution.

A summary of the many instrumentation and simulation tools used to evaluate memory system performance.

Teaching

Recitation Groups:

• Digitaltechnik - SS03
  
• Systemprogrammierung - WS00/01, WS01/02
  
• Informatik IV - SS00, SS01, SS02
  
• System-Software - WS99/00, WS02/03, WS03/04, WS04/05
  

Assistentenkoordination (ETH intern).

Student Projects

Available topics are here (ETH intern).

Diploma Theses Supervised:

• Cristian Morariu - Memory Compression on G5, SS04
• Daniel Steiner - The Impact of Memory Optimization through Data Compression, WS02/03
• Nicolas Wettstein - Effective Swap Mechanism for Compressed Memory, SS02
• Philip Oswald - Kernel Support for Processor Reservation on a SMP Machine, SS02
• Zoltan Somodi - Performance Impact of Memory Systems, SS01
• Raul Silaghi - Memory Access Patterns of Scientific Codes, SS00

Publications

• I. Chihaia Tuduce and T. Gross, "Adaptive Main Memory Compression" Proceedings of USENIX'05 Annual Technical Conference, Anaheim, CA, April 2005
  [Full-Document PDF]
• I. Chihaia Tuduce and T. Gross, "Collecting Information on Locality (Data Accesses)" Notes Workshop on Hardware Performance Monitor Design and Functionality , San Francisco, CA, February 2005
• I. Chihaia and T. Gross, "An Analytical Model for Software-Only Main Memory Compression" Proceedings of the 3rd Workshop on Memory Performance Issues (WMPI-2004), Munich, Germany, June 2004.
  [Full-Document PDF]
• I. Chihaia and T. Gross, "Effectiveness of Simple Memory Models for Performance Prediction" Proceedings of 2004 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2004), pp. 98-105, Austin, TX, March 2004
  [Full-Document PDF]