Student Projects
We offer a variety of topics related to "software technology". These topics can be pursued in the context of a B.S. thesis or an M.S. thesis. We also offer the possibility to receive academic credit for a research project (263-0600, a computer science M.S. student must have completed either 2 "labs" or one lab and one core focus course to enroll) or for a semester project (227-1572-01L and 227-1572-02L for students enrolled in the MSc EEIT).
Several projects can done in collaboration with industrial research laboratories and/or Swiss or foreign universities.
Concurrency bugs are not only difficult to detect, but also tedious to analyze and debug. We explore an approach that combines traditional step-by-step debugging with software model checking and replay to enable a programmer to analyze concurrency bugs just as easily as bugs in sequential programs.
Possible projects in this area:
- Designing and implementing a tool that compares erroneous execution traces to non-erroneous ones to pinpoint the source of a concurrency bug.
- Extending an existing check-and-replay debugging tool to support the "drop to frame" feature known from Eclipse, IntelliJ, etc.
Environment: Java, JPF (Java Pathfinder)
Keywords: concurrency, parallelism, debugging, jpf)
Contact: Michael Faes (contact, website)
Supervisor: Prof. Thomas Gross
Parallel Roles is a new approach to object-oriented parallel programming that uses roles and role transitions as a basis to reason about parallel effects on shared state. The experimental Rolez language that implements this approach is a Java-like language that guarantees deterministic parallel execution.
Details on possible projects will follow soon.
Environment: Java, Eclipse, Xtext
Keywords: deterministic parallelism, OOP, type systems
Contact: Michael Faes (contact, website)
Supervisor: Prof. Thomas Gross
Body Channel Communication (BCC) is a technique to pass information through the human body: an external modulated electric field is generated and coupled to the user, which then can be measured at any point of his/her body. Thus, the body acts as transmission media in this communication system.
Several student projects are available, including (but not limited to):
- performing channel characteristic measurements on the BCC channel
- testbed development for BCC devices, e.g. online calibration for varying device sensitivity
- application development to demonstrate BCC.
A wearable BCC prototype was developed by Disney Research, as well as additional static BCC objects, which can be used throughout the student projects.
Environment: C/C++, Matlab
Keywords: Body Channel Communication (BCC), embedded systems, wearables, prototype development, testbed building, application design, evaluation
Contact: Virag Varga, STD 3, virag.varga at disneyresearch.com
Supervisor: Prof. Thomas Gross, CAB H69.1, thomas.gross at inf.ethz.ch
Pipelining is a technique to parallelize some loops with cross-iteration dependences. The loop body is partitioned into a sequence of stages that allow overlapped execution of different iterations. Automatic partitioning is a hard task and may be impossible for some programs written in programming languages that offer pointers, e.g., C. An alternative approach to partitioning is the programmer to indicate the stages of the pipeline using directives, and the compiler to generate parallel code according to these directives. This approach simplifies the work of the compiler, but it becomes a heavy burden for the programmer. The goal of this project is to balance the work of the compiler and the programmer without sacrificing flexibility.
Particularly, we are interested in extending a C compiler, LLVM or GCC, with directives for parallelization of pipelined loops. Directives offer flexibility since the programmer indicates whether a loop can be safely expressed as a pipeline and how this can be done. However, to alleviate the programming effort, the compiler performs static analysis to ensure that the directives given by the programmer lead to a sound parallel execution. There is no guarantee about the result of the static analysis, since it may be impossible to determine whether the transformation is safe or not. Nevertheless, the compiler can report either an error or a warning message when the transformation is wrong or may be wrong, respectively.
Environment: C++
Keyword: pipeline model, automatic parallelization, static analysis
Contact: Aristeidis Mastoras, aristeidis.mastoras (at) inf.ethz.ch
Supervisor: Prof. Thomas Gross, thomas.gross (at) inf.ethz.ch
external page Piper is an algorithm that integrates pipeline parallelism into the work-stealing scheduler of Cilk. We are interested in evaluating the performance of Piper using the external page Intel Cilk Plus implementation. Piper handles linear pipelines where the stages and their data dependences may be determined at run-time. Moreover, Piper allows pipeline and fork-join parallelism to be arbitrarily nested. However, Piper performs poorly for fine-grained loops. Thus, the goal of this thesis is to find the main sources for the overhead of Piper and investigate strategies that may reduce this overhead.
Environment: C/C++, Intel Cilk Plus
Keyword: linear pipeline, scheduling, work-stealing
Contact: Aristeidis Mastoras, aristeidis.mastoras (at) inf.ethz.ch
Supervisor: Prof. Thomas Gross, thomas.gross (at) inf.ethz.ch